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1 tm HA5024 quad 125mhz video current feedback amplifier with disable the HA5024 is a quad version of the popular intersil ha5020. it features wide bandwidth and high slew rate, and is optimized for video applications and gains between 1 and 10. it is a current feedback amplifier and thus yields less bandwidth degradation at high closed loop gains than voltage feedback amplifiers. the low differential gain and phase, 0.1db gain flatness, and ability to drive two back terminated 75 ? cables, make this amplifier ideal for demanding video applications. the HA5024 also features a disable function that significantly reduces supply current while forcing the output to a true high impedance state. this functionality allows 2:1 and 4:1 video multiplexers to be implemented with a single ic. the current feedback design allows the user to take advantage of the amplifier?s bandwidth dependency on the feedback resistor. by reducing r f , the bandwidth can be increased to compensate for decreases at higher closed loop gains or heavy output loads. pinout HA5024 (pdip, soic) top view features ? quad version of ha-5020 ? individual output enable/disable ? input offset voltage . . . . . . . . . . . . . . . . . . . . . . . . 800 v ? wide unity gain bandwidth . . . . . . . . . . . . . . . . . 125mhz ? slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475v/ s ? differential gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03% ? differential phase. . . . . . . . . . . . . . . . . . . . . 0.03 degrees ? supply current (per amplifier) . . . . . . . . . . . . . . . . 7.5ma ? esd protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4000v ? guaranteed specifications at 5v supplies applications ? video multiplexers; video switching and routing ? video gain block ? video distribution amplifier/rgb amplifier ? flash a/d driver ? current to voltage converter ? medical imaging ? radar and imaging systems 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1 out1 -in1 +in1 dis1 nc v+ +in2 dis2 -in2 out2 out4 +in4 dis4 nc -in4 v- dis3 +in3 -in3 out3 + - + - + - + - ordering information part number temp. range ( o c) package pkg. no. HA5024ip -40 to 85 20 ld pdip e20.3 HA5024ib -40 to 85 20 ld soic m20.3 HA5024eval high speed op amp dip evaluation board data sheet september 1998 fn3550.4 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a trademark of intersil americas inc. copyright ? intersil americas inc. 2002. all rights reserved
2 absolute maximum ratings thermal information voltage between v+ and v- terminals . . . . . . . . . . . . . . . . . . . 36v dc input voltage (note 3) . . . . . . . . . . . . . . . . . . . . . . . . v supply differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10v output current (note 4) . . . . . . . . . . . . . . . . short circuit protected esd rating (note 3) human body model (per mil-std-883 method 3015.7) . . .2000v operating conditions temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . -40 o c to 85 o c supply voltage range (typical) . . . . . . . . . . . . . . . . 4.5v to 15v thermal resistance (typical, note 2) ja ( o c/w) pdip package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 soic package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 maximum junction temperature (note 1) . . . . . . . . . . . . . . . . .175 o c maximum junction temperature (plastic package, note 1) . . . 150 o c maximum storage temperature range . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c (soic - lead tips only) caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. notes: 1. maximum power dissipation, including output load, must be designed to maintain junction temperature below 175 o c for die, and below 150 o c for plastic packages. see application information section for safe operating area information. 2. ja is measured with the component mounted on an evaluation pc board in free air. 3. the non-inverting input of unused amplifiers must be connected to gnd. 4. output is protected for short circuits to ground. brief short circuits to ground will not degrade reliability, however, conti nuous (100% duty cycle) output current should not exceed 15ma for maximum reliability. electrical specifications v supply = 5v, r f = 1k ?, a v = +1, r l = 400 ?, c l 10pf,unless otherwise specified parameter test conditions (note 11) test level temp. ( o c) min typ max units input characteristics input offset voltage (v io )a25-0.83mv afull- - 5 mv delta v io between channels a full - 1.2 3.5 mv average input offset voltage drift b full - 5 - v/ o c v io common mode rejection ratio note 5 a 25 53 - - db a full 50 - - db v io power supply rejection ratio 3.5v v s 6.5v a 25 60 - - db afull55 - - db input common mode range note 5 a full 2.5 - - v non-inverting input (+in) current a 25 - 3 8 a afull- - 20 a +in common mode rejection (+i bcmr =) note 5 a 25 - - 0.15 a/v afull- - 0.5 a/v +in power supply rejection 3.5v v s 6.5v a 25 - - 0.1 a/v afull- - 0.3 a/v inverting input (-in) current a 25,85 - 4 12 a a-40- 1030 a delta -in bias current between channels a 25,85 - 6 15 a a-40- 1030 a -in common mode rejection note 5 a 25 - - 0.4 a/v afull- - 1.0 a/v 1 r in --------- - HA5024
3 -in power supply rejection 3.5v v s 6.5v a 25 - - 0.2 a/v afull- - 0.5 a/v input noise voltage f = 1khz b 25 - 4.5 - nv/ hz +input noise current f = 1khz b 25 - 2.5 - pa/ hz -input noise current f = 1khz b 25 - 25.0 - pa/ hz transfer characteristics transimpedence note 16 a 25 1.0 - - m ? afull0.85- - m ? open loop dc voltage gain r l = 400 ? , v out = 2.5v 25a 25 70 - - db afull65 - - db open loop dc voltage gain r l = 100 ? , v out = 2.5v a 25 50 - - db afull45 - - db output characteristics output voltage swing r l = 150 ? a25 2.5 3.0 - v afull 2.5 3.0 - v output current r l = 150 ? bfull 16.6 20.0 - ma output current, short circuit v in = 2.5v, v out = 0v a full 40 60 - ma output current, disabled (note 5) disable = 0v, v out = 2.5v, v in = 0v afull- - 2 a output disable time note 12 b 25 - 40 - s output enable time note 13 b 25 - 40 - ns output capacitance disabled note 14 b 25 - 15 - pf power supply characteristics supply voltage range a 25 5 - 15 v quiescent supply current a full - 7.5 10 ma/op amp supply current, disabled disable = 0v a full - 5 7.5 ma/op amp disable pin input current disable = 0v a full - 1.0 1.5 ma minimum pin 8 current to disable note 6 a full 350 - - a maximum pin 8 current to enable note 7 a full - - 20 a ac characteristics (a v = +1) slew rate note 8 b 25 275 350 - v/ s full power bandwidth note 9 b 25 22 28 - mhz rise time note 10 b 25 - 6 - ns fall time note 10 b 25 - 6 - ns propagation delay note 10 b 25 - 6 - ns overshoot b25-4.5- % -3db bandwidth v out = 100mv b 25 - 125 - mhz settling time to 1% 2v output step b 25 - 50 - ns settling time to 0.25% 2v output step b 25 - 75 - ns electrical specifications v supply = 5v, r f = 1k ?, a v = +1, r l = 400 ?, c l 10pf,unless otherwise specified (continued) parameter test conditions (note 11) test level temp. ( o c) min typ max units HA5024
4 ac characteristics (a v = +2, r f = 681 ? ) slew rate note 8 b 25 - 475 - v/ s full power bandwidth note 9 b 25 - 26 - mhz rise time note 10 b 25 - 6 - ns fall time note 10 b 25 - 6 - ns propagation delay note 10 b 25 - 6 - ns overshoot b25-12- % -3db bandwidth v out = 100mv b 25 - 95 - mhz settling time to 1% 2v output step b 25 - 50 - ns settling time to 0.25% 2v output step b 25 - 100 - ns gain flatness 5mhz b 25 - 0.02 - db 20mhz b 25 - 0.07 - db ac characteristics (a v = +10, r f = 383 ? ) slew rate note 8 b 25 350 475 - v/ s full power bandwidth note 9 b 25 28 38 - mhz rise time note 10 b 25 - 8 - ns fall time note 10 b 25 - 9 - ns propagation delay note 10 b 25 - 9 - ns overshoot b25-1.8- % -3db bandwidth v out = 100mv b 25 - 65 - mhz settling time to 1% 2v output step b 25 - 75 - ns settling time to 0.1% 2v output step b 25 - 130 - ns video characteristics differential gain (note 15) r l = 150 ? b 25 - 0.03 - % differential phase (note 15) r l = 150 ? b 25 - 0.03 - degrees notes: 5. v cm = 2.5v. at -40 o c product is tested at v cm = 2.25v because short test duration does not allow self heating. 6. r l = 100 ? , v in = 2.5v. this is the minimum current which must be pulled out of the disable pin in order to disable the output. the output is considered disabled when -10mv v out +10mv. 7. v in = 0v. this is the maximum current that can be pulled out of the disable pin with the HA5024 remaining enabled. the HA5024 is considered disabled when the supply current has decreased by at least 0.5ma. 8. v out switches from -2v to +2v, or from +2v to -2v. specification is from the 25% to 75% points. 9. . 10. r l = 100 ? , v out = 1v. measured from 10% to 90% points for rise/fall times; from 50% points of input and output for propagation delay. 11. a. production tested; b. typical or guaranteed limit based on characterization; c. design typical for information only. 12. v in = +2v, disable = +5v to 0v. measured from the 50% point of disable to v out = 0v. 13. v in = +2v, disable = 0v to +5v. measured from the 50% point of disable to v out = 2v. 14. v in = 0v, force v out from 0v to 2.5v, t r = t f = 50ns, disable = 0v. 15. measured with a vm700a video tester using an ntc-7 composite vits. 16. v out = 2.5v. at -40 o c product is tested at v out = 2.25v because short test duration does not allow self heating. electrical specifications v supply = 5v, r f = 1k ?, a v = +1, r l = 400 ?, c l 10pf,unless otherwise specified (continued) parameter test conditions (note 11) test level temp. ( o c) min typ max units fpbw slew rate 2 v peak ---------------------------- - ;v peak 2v == HA5024
5 test circuits and waveforms figure 1. test circuit for transimpedance measurements figure 2. small signal pulse response circuit figure 3. large signal pulse response circuit note: 17. a series input resistor of 100 ? is recommended to limit input currents in case input signals are present before the HA5024 is powered up. figure 4. small signal response figure 5. large signal response + - 50 ? 50 ? dut hp4195 network analyzer v in v out r l r f , 1k ? 100 ? 50 ? + - dut 100 ? (note 17) v in v out r l r f , 681 ? 400 ? 50 ? + - dut r i 681 ? 100 ? (note 17) vertical scale: v in = 100mv/div., v out = 100mv/div. horizontal scale: 20ns/div. vertical scale: v in = 1v/div., v out = 1v/div. horizontal scale: 50ns/div. HA5024
6 schematic (one amplifier of four) r 2 800 r 5 2.5k r 6 15k d 2 q p2 r 1 60k q n1 r 3 6k q n2 d 1 q n3 q n4 r 4 800 r 7 15k dis q n7 r 9 820 q p4 q n6 q p3 r 8 1.25k q n5 +in q p7 r 13 1k r 12 280 q p6 q n8 q p5 r 10 820 q n9 q n11 q n10 q p10 q p8 q p9 r 11 1k r 14 280 q n14 r 16 400 r 22 280 q n16 r 17 280 r 18 280 q p11 r 15 400 r 19 400 q p14 q n12 q p12 -in q n13 q p13 c 2 r 23 400 r 26 200 r 24 140 r 20 140 q p15 c 1 q n17 r 25 20 q n18 r 25 140 r 21 140 r 26 200 q p16 r 27 200 r 33 2k q p18 q n20 q p17 r 28 20 q n15 r 30 7 q n19 out q n21 r 32 5 r 29 9.5 q p19 q p20 r 31 5 v+ v- q p1 r 33 800 1.4pf 1.4pf HA5024
7 application information optimum feedback resistor the plots of inverting and non-inverting frequency response, see figure 11 and figure 12 in the typical performance curves section, illustrate the performance of the HA5024 in various closed loop gain configurations. although the bandwidth dependency on closed loop gain isn?t as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. this decrease may be minimized by taking advantage of the current feedback amplifier?s unique relationship between bandwidth and r f . all current feedback amplifiers require a feedback resistor, even for unity gain applications, and r f , in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. thus, the amplifier?s bandwidth is inversely proportional to r f . the HA5024 design is optimized for a 1000 ? r f at a gain of +1. decreasing r f in a unity gain application decreases stability, resulting in excessive peaking and overshoot. at higher gains the amplifier is more stable, so r f can be decreased in a trade-off of stability for bandwidth. the table below lists recommended r f values for various gains, and the expected bandwidth. pc board layout the frequency response of this amplifier depends greatly on the amount of care taken in designing the pc board. the use of low inductance components such as chip resistors and chip capacitors is strongly recommended. if leaded components are used the leads must be kept short especially for the power supply decoupling components and those components connected to the inverting input. attention must be given to decoupling the power supplies. a large value (10 f) tantalum or electrolytic capacitor in parallel with a small value (0.1 f) chip capacitor works well in most cases. a ground plane is strongly recommended to control noise. care must also be taken to minimize the capacitance to ground seen by the amplifier?s inverting input (-in). the larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. it is recommended that the ground plane be removed under traces connected to -in, and that connections to -in be kept as short as possible to minimize the capacitance from this node to ground. driving capacitive loads capacitive loads will degrade the amplifier?s phase margin resulting in frequency response peaking and possible oscillations. in most cases the oscillation can be avoided by placing an isolation resistor (r) in series with the output as shown in figure 6. the selection criteria for the isolation resister is highly dependent on the load, but 27 ? has been determined to be a good starting value. power dissipation considerations due to the high supply current inherent in quad amplifiers, care must be taken to insure that the maximum junction temperature (t j, see absolute maximum ratings) is not exceeded. figure 7 shows the maximum ambient temperature versus supply voltage for the available package styles (plastic dip, soic). at 5v dc quiescent operation both package styles may be operated over the full industrial range of -40 o c to 85 o c. it is recommended that thermal calculations, which take into account output power, be performed by the designer. enable/disable function when enabled the amplifier functions as a normal current feedback amplifier with all of the data in the electrical specifications table being valid and applicable. when disabled the amplifier output assumes a true high gain (a cl )r f ( ? ) bandwidth (mhz) -1 750 100 +1 1000 125 +2 681 95 +5 1000 52 +10 383 65 -10 750 22 v in v out c l r t + - r i r f r figure 6. placement of the output isolation resistor, r 100 ? 130 120 110 100 90 70 5 7 9 111315 max. ambient temperature supply voltage ( v) pdip 80 60 50 soic figure 7. maximum operating ambient tempera- ture vs supply voltage HA5024
8 impedance state and the supply current is reduced significantly. the circuit shown in figure 8 is a simplified schematic of the enable/disable function. the large value resistors in series with the disable pin makes it appear as a current source to the driver. when the driver pulls this pin low current flows out of the pin and into the driver. this current, which may be as large as 350 a when external circuit and process variables are at their extremes, is required to insure that point ?a? achieves the proper potential to disable the output.the driver must have the compliance and capability of sinking all of this current. when v cc is +5v the disable pin may be driven with a dedicated ttl gate. the maximum low level output voltage of the ttl gate, 0.4v, has enough compliance to insure that the amplifier will always be disabled even though d 1 will not turn on, and the ttl gate will sink enough current to keep point ?a? at its proper voltage. when v cc is greater than +5v the disable pin should be driven with an open collector device that has a breakdown rating greater than v cc . referring to figure 8, it can be seen that r 6 will act as a pull-up resistor to +v cc if the disable pin is left open. in those cases where the enable/disable function is not required on all circuits some circuits can be permanently enabled by letting the disable pin float. if a driver is used to set the enable/disable level, be sure that the driver does not sink more than 20 a when the disable pin is at a high level. ttl gates, especially cmos versions, do not violate this criteria so it is permissible to control the enable/disable function with ttl. typical applications four channel video multiplexer referring to the amplifier u 1a in figure 9, r 1 terminates the cable in its characteristic impedance of 75 ? , and r 4 back terminates the cable in its characteristic impedance. the amplifier is set up in a gain configuration of +2 to yield an overall network gain of +1 when driving a double terminated cable. the value of r 3 can be changed if a different network gain is desired. r 5 holds the disable pin at ground thus inhibiting the amplifier until the switch, s 1 , is thrown to position 1. at position 1 the switch pulls the disable pin up to the plus supply rail thereby enabling the amplifier. since all of the actual signal switching takes place within the amplifier, its differential gain and phase parameters, which are 0.03% and 0.03 degrees respectively, determine the circuit?s performance. the other three circuits, u 1b through u 1d , operate in a similar manner. when the plus supply rail is 5v the disable pin can be driven by a dedicated ttl gate as discussed earlier. if a multiplexer ic or its equivalent is used to select channels its logic must be break before make. when these conditions are satisfied the HA5024ip is often used as a remote video multiplexer, and the multiplexer may be extended by adding more amplifier ics. low impedance multiplexer two common problems surface when you try to multiplex multiple high speed signals into a low impedance source such as an a/d converter. the first problem is the low source impedance which tends to make amplifiers oscillate and causes gain errors. the second problem is the multiplexer which supplies no gain, introduces all kinds of distortion and limits the frequency response. using op amps which have an enable/disable function, such as the HA5024, eliminates the multiplexer problems because the external mux chip is not needed, and the HA5024 can drive low r 6 15k r 7 15k +v cc enable/disable input d 1 q p3 r 8 q p18 a r 33 r 10 figure 8. simplified schematic of enable/disable function HA5024
9 impedance (large capacitance) loads if a series isolation resistor is used. referring to figure 10, both inputs are terminated in their characteristic impedance; 75 ? is typical for video applications. since the drivers usually are terminated in their characteristic impedance the input gain is 0.5, thus the amplifiers, u 2 , are configured in a gain of +2 to set the circuit gain equal to one. resistors r 2 and r 3 determine the amplifier gain, and if a different gain is desired r 2 should be changed according to the equation g = (1 + r 3 /r 2 ). r 3 sets the frequency response of the amplifier so you should refer to the manufacturers data sheet before changing its value. r 5 , c 1 and d 1 are an asymmetrical charge/discharge time circuit which configures u 1 as a break before make switch to prevent both amplifiers from being active simultaneously. if this design is extended to more channels the drive logic must be designed to be break before make. r 4 is enclosed in the feedback loop of the amplifier so that the large open loop amplifier gain of u 2 will present the load with a small closed loop output impedance while keeping the amplifier stable for all values of load capacitance. the circuit shown in figure 10 was tested for the full range of capacitor values with no oscillations being observed; thus, problem one has been solved.the fre quency and gain characteristics of the circuit are now those of the amplifier independent of any multiplexing action; thus, problem two has been solved. the multiplexer transition time is approximately 15 s with the component values shown. notes: 18. u 1 is HA5024ip. 19. all resistors in ?. 20. s 1 is break before make. 21. use ground plane. figure 9. four channel video multiplexer + - u 1a + - u 1b + - + - video input #1 video output 75 ? load r 4 75 3 2 4 r 1 75 r 3 681 r 5 2000 r 2 681 to 1 r 6 75 r 8 681 r 7 681 r 9 75 10 8 9 7 r 10 2000 1 r 21 100 2 3 4 video input #3 r 11 75 13 12 14 15 -5v 11 r 13 681 r 12 681 r 15 2000 r 14 75 +5v s 1 all off video input #4 r 16 75 18 19 17 6 20 r 19 75 r 20 2000 r 17 681 r 18 681 u 1c u 1d +5v +5v in +5v 0.1 f 10 f0.1 f10 f -5v in -5v 100 ? (note 17) 100 ? (note 17) 100 ? (note 17) 100 ? (note 17) HA5024
10 input b + - -5v + - +5v inhibit channel switch input a r 1a 75 r 1b 75 d 1a 1n4148 u 1c u 1a u 1b u 1d r 6 100k r 5a 2000 c 1a 0.047 f r 5b 2000 d 1b 1n4148 r 1a 681 1 2 3 4 16 r 3a 681 r 4a 27 0.01 f r 2b 681 r 4b 27 r 3b 681 0.01 f output 7 6 5 13 10 u 2b u 2a c 1b 0.047 f notes: 22. u 2 : ha5022/24. 23. u 1 : cd4011. figure 10. low impedance multiplexer 100 ? (note 17) 100 ? (note 17) typical performance curves v supply = 5v, a v = +1, r f = 1k ?, r l = 400 ?, t a = 25 o c, unless otherwise specified figure 11. non-inverting frequency response figure 12. inverting frequency response 5 4 3 2 1 0 -1 -2 -3 -4 -5 normalized gain (db) frequency (mhz) 2 10 100 200 v out = 0.2v p-p c l = 10pf a v = +1, r f = 1k ? a v = 2, r f = 681 ? a v = 5, r f = 1k ? a v = 10, r f = 383 ? 5 4 3 2 1 0 -1 -2 -3 -4 -5 2 10 100 200 frequency (mhz) normalized gain (db) v out = 0.2v p-p c l = 10pf r f = 750 ? a v = -1 a v = -2 a v = -10 a v = -5 HA5024
11 figure 13. phase response as a function of frequency figure 14. bandwidth and gain peaking vs feedback resistance figure 15. bandwidth and gain peaking vs feedback resistance figure 16. bandwidth and gain peaking vs load resistance figure 17. bandwidth vs feedback resistance figure 18. small signal overshoot vs load resistance typical performance curves v supply = 5v, a v = +1, r f = 1k ?, r l = 400 ?, t a = 25 o c, unless otherwise specified (continued) frequency (mhz) 2 10 100 200 0 -45 -90 -135 -100 -225 -270 -315 -360 180 135 90 0 -45 -90 -135 45 -180 noninverting phase (degrees) inverting phase (degrees) v out = 0.2v p-p c l = 10pf a v = +10, r f = 383 ? a v = -10, r f = 750 ? a v = -1, r f = 750 ? a v = +1, r f = 1k ? feedback resistor ( ? ) 500 700 900 1100 1300 1500 140 130 120 10 5 0 -3db bandwidth (mhz) gain peaking (db) v out = 0.2v p-p c l = 10pf -3db bandwidth gain peaking a v = +1 feedback resistor ( ? ) -3db bandwidth (mhz) gain peaking (db) 100 95 90 0 350 500 650 800 950 1100 -3db bandwidth gain peaking v out = 0.2v p-p c l = 10pf a v = +2 5 10 load resistor ( ? ) -3db bandwidth (mhz) gain peaking (db) 130 120 110 100 90 80 0 200 400 600 800 1000 6 4 2 0 v out = 0.2v p-p c l = 10pf -3db bandwidth gain peaking a v = +1 80 60 40 20 0 200 350 500 650 800 950 -3db bandwidth (mhz) feedback resistor ( ? ) v out = 0.2v p-p c l = 10pf a v = +10 load resistance ( ? ) 0 200 400 600 800 1000 16 6 0 overshoot (%) v out = 0.1v p-p c l = 10pf v supply = 5v, a v = +2 v supply = 15v, a v = +1 v supply = 5v, a v = +1 v supply = 15v, a v = +2 12 HA5024
12 figure 19. differential gain vs supply voltage figure 20. differential phase vs supply voltage figure 21. distortion vs frequency figure 22. rejection ratios vs frequency figure 23. propagation delay vs temperature figure 24. propagation delay vs supply voltage typical performance curves v supply = 5v, a v = +1, r f = 1k ?, r l = 400 ?, t a = 25 o c, unless otherwise specified (continued) supply voltage ( v) 3 5 7 9 11 13 15 0.10 0.08 0.06 0.04 0.02 0.00 differential gain (%) frequency = 3.58mhz r l = 75 ? r l = 150 ? r l = 1k ? 0.08 0.06 0.04 0.02 0.00 3 5 7 9 11 13 15 supply voltage ( v) differential phase (degrees) r l = 1k ? r l = 75 ? r l = 150 ? frequency = 3.58mhz -40 -50 -60 -70 -80 -90 0.3 1 10 frequency (mhz) distortion (dbc) v out = 2.0v p-p c l = 30pf hd 3 hd 2 3rd order imd hd 2 hd 3 frequency (mhz) 0 -10 -20 -30 -40 -50 -60 -70 -80 rejection ratio (db) 0.001 0.01 0.1 1 10 30 a v = +1 cmrr positive psrr negative psrr temperature ( o c) -50 -25 0 25 50 75 100 125 8.0 7.5 7.0 6.5 6.0 propagation delay (ns) r l = 100 ? v out = 1.0v p-p a v = +1 supply voltage ( v) propagation delay (ns) 12 10 8 6 4 3 5 7 9 11 13 15 r load = 100 ? v out = 1.0v p-p a v = +10, r f = 383 ? a v = +2, r f = 681 ? a v = +1, r f = 1k ? HA5024
13 figure 25. slew rate vs temperature figure 26. non-inverting gain flatness vs frequency figure 27. inverting gain flatness vs frequency figure 28. input noise characteristics figure 29. input offset voltage vs temperature figure 30. +input bias current vs temperature typical performance curves v supply = 5v, a v = +1, r f = 1k ?, r l = 400 ?, t a = 25 o c, unless otherwise specified (continued) temperature ( o c) -50 -25 0 25 50 75 100 125 500 450 400 350 300 250 200 150 100 slew rate (v/ s) v out = 2v p-p + slew rate - slew rate frequency (mhz) 51015202530 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 normalized gain (db) v out = 0.2v p-p c l = 10pf a v = +2, r f = 681 ? a v = +5, r f = 1k ? a v = +1, r f = 1k ? a v = +10, r f = 383 ? 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 normalized gain (db) frequency (mhz) 51015202530 v out = 0.2v p-p c l = 10pf a v = -1 a v = -2 a v = -5 a v = -10 r f = 750 ? frequency (khz) 0.01 0.1 1 10 100 voltage noise (nv/ hz ) current noise (pa/ hz ) 100 80 60 40 20 0 1000 800 600 400 200 0 a v = +10, r f = 383 ? -input noise current +input noise current input noise voltage 1.5 1.0 0.5 0.0 -60 -40 -20 0 40 60 80 100 120 140 20 v io (mv) temperature ( o c) 2 0 -2 -4 -60 -40 -20 0 40 60 80 100 120 140 20 bias current ( a) temperature ( o c) HA5024
14 figure 31. -input bias current vs temperature figure 32. transimpedance vs temperature figure 33. supply current vs supply voltage figure 34. rejection ratio vs temperature figure 35. supply current vs disable input voltage figure 36. output swing vs temperature typical performance curves v supply = 5v, a v = +1, r f = 1k ?, r l = 400 ?, t a = 25 o c, unless otherwise specified (continued) 22 20 18 16 -60 -40 -20 0 40 60 80 100 120 140 20 temperature ( o c) bias current ( a) temperature ( o c) 4000 3000 2000 1000 transimpedance (k ? ) -60 -40 -20 0 40 60 80 100 120 14 0 20 3 4 5 6 7 8 9 10 11 12 13 14 15 25 20 15 10 5 i cc (ma) supply voltage ( v) 125 o c 55 o c 25 o c 58 60 62 64 66 68 70 72 74 -100 -50 0 50 100 150 +psrr -psrr cmrr 200 250 temperature ( o c) rejection ratio (db) 1 0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 disable input voltage (v) 40 30 20 10 0 supply current (ma) +5v +10v +15v 4.0 3.8 3.6 -60 -40 -20 0 40 60 80 100 120 140 20 temperature ( o c) output swing (v) HA5024
15 figure 37. output swing vs load resistance figure 38. input offset voltage change between channels vs temperature figure 39. input bias current change between channels vs temperature figure 40. disable supply current vs supply voltage figure 41. channel separation vs frequency figure 42. enable/disable time vs output voltage typical performance curves v supply = 5v, a v = +1, r f = 1k ?, r l = 400 ?, t a = 25 o c, unless otherwise specified (continued) 0.01 0.10 1.00 10.00 30 20 10 0 v out (v p-p ) load resistance (k ? ) v s = 15v v s = 10v v s = 4.5v -60 -40 -20 0 40 60 80 100 120 140 20 1.2 1.1 1.0 0.9 0.8 v io (mv) temperature ( o c) -60 -40 -20 1.5 1.0 0.5 0.0 temperature ( o c) ? bias current ( a) 40 60 80 100 120 140 20 0 3456789101112131415 30 25 20 15 10 5 supply voltage ( v) i cc (ma) -55 o c 25 o c 125 o c -30 -40 -50 -60 -70 -80 0.1 1 10 30 separation (db) frequency (mhz) a v = +1 v out = 2v p-p disable enable enable disable enable time (ns) 20 18 16 14 12 10 8 6 4 2 0 output voltage (v) -2.5 -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 2.5 32 30 28 26 24 22 20 18 16 14 12 disable time ( s) HA5024
16 all intersil u.s. products are manufactured, assembled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com figure 43. disable feedthrough vs frequency figure 44. transimpedance vs frequency figure 45. transimpedence vs frequency typical performance curves v supply = 5v, a v = +1, r f = 1k ?, r l = 400 ?, t a = 25 o c, unless otherwise specified (continued) -20 -40 -50 -60 -70 -80 0.1 1 10 20 feedthrough (db) frequency (mhz) -30 -10 0 disable = 0v v in = 5v p-p r f = 750 ? -135 -90 -45 0 45 90 135 180 10 1 0.1 0.01 0.001 0.001 0.01 0.1 1 10 100 phase angle (degrees) transimpedance (m ? ) r l = 100 ? frequency (mhz) -135 -90 -45 0 45 90 135 180 10 1 0.1 0.01 0.001 0.001 0.01 0.1 1 10 100 phase angle (degrees) r l = 400 ? frequency (mhz) transimpedance (m ? ) HA5024
17 die characteristics die dimensions: 2680 m x 2600 m x 483 m metallization: type: metal 1: alcu (1%) thickness: metal 1: 8k ? 0.4k ? type: metal 2: alcu (1%) thickness: metal 2: 16k ? 0.8k ? substrate potential (powered up): v- passivation: type: nitride thickness: 4k ? 0.4k ? transistor count: 248 process: high frequency bipolar dielectric isolation metallization mask layout HA5024 9 8 3 22019 13 11 1 4 6 7 10 12 14 -in1 out1 -in2 out2 out3 -in3 +in3 dis3 v- dis4 +in4 -in4 15 17 18 +in1 dis1 v+ dis2 +in2 out4 HA5024

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